{"id":4625,"date":"2023-08-11T16:23:00","date_gmt":"2023-08-11T08:23:00","guid":{"rendered":"https:\/\/www.qhsmt.com\/?p=4625"},"modified":"2023-08-02T17:08:15","modified_gmt":"2023-08-02T09:08:15","slug":"how-to-optimize-switching-power-supply-layout","status":"publish","type":"post","link":"https:\/\/www.qhsmt.com\/zh\/2023\/08\/11\/how-to-optimize-switching-power-supply-layout\/","title":{"rendered":"How to Optimize Switching Power Supply Layout"},"content":{"rendered":"

In a successful power supply design, power supply layout is one of the most important links. However, everyone has their own opinions and reasons for how to do this. The truth is, many different solutions lead to the same goal; most power supplies will work fine if the design isn’t a real mess.Today qihe smt pick and place machine will share How to Optimize Switching Power Supply Layout .<\/p>\n\n\n\n

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Of course, there are also some general rules, such as:<\/p>\n\n\n\n

Do not run sensitive signals in fast switching signals. In other words, do not run feedback traces under switch nodes.
Make sure the power load trace and ground plane are sized enough to support the current flow.
Try to maintain at least one continuous ground plane.
Using enough vias (usually starting with 1A per via), connect the ground planes.
Beyond these basic layout rules, I usually start by identifying the switching loops and then determine which loops have high frequency switching currents.<\/p>\n\n\n\n

There are two states in a buck power supply (assuming continuous conduction mode): when the control switch (Q1) is on and when the control switch is off. When the control switch is on, current flows from the input to the inductor. When the control switch is turned off, current continues to flow in the inductor and through the diode (D1). Continuous current output.<\/p>\n\n\n\n

But there is input pulse current, and that’s what you need to be concerned about in your layout. In Figure 1, this loop is labeled “High Frequency Loop” and shown in blue. The first goal of your layout is to connect Q1, D1, and the input capacitor with the shortest, lowest inductance return path. The smaller this loop, the lower the noise generated by the switching. If this is ignored, the power supply will not work effectively.<\/p>\n\n\n\n

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The procedure for identifying switching loops applies to all power topologies. The steps of the procedure are:<\/p>\n\n\n\n

The current path is determined in the ON state.
Determines the current path in the off state.
Find the location of the continuous current.
Locate the location of the intermittent current.
Minimize discontinuous current loops.<\/p>\n\n\n\n

The critical loops for a given power stage configuration are listed in this list:<\/p>\n\n\n\n

Buck – input capacitor return.
Boost – output capacitor loop.
Inverting Buck-Boost \u2013 Input and Output Capacitor Loop.
Flyback – input and output capacitor return.
Fly-Buck\u2122 – Input capacitor return.
SEPIC – output capacitor circuit.
Zeta\u2014\u2014Input capacitor circuit.
Forward, Half-Bridge, Full-Bridge – Input Capacitor Loop.<\/p>\n\n\n\n

Power supply layout is an art form, everyone has their own way, and many times it will work. Just make sure that when you locate parts for your power stage, you locate the high frequency switching loop first; you’ll save yourself time and frustration.<\/p>\n\n\n\u9605\u8bfb\u66f4\u591a\uff1aHow to Optimize Switching Power Supply Layout<\/span><\/a>\n\n\n

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